The present invention relates to an alignment apparatus, more particularly to such an alignment apparatus as used, in the process of semiconductor device manufacturing, to align wafers with reticles or masks.
As for such alignment apparatuses, proposals have been made, in U.S. Pat. No. 4,219,719 issued on Aug. 26, 1980 and Japanese Laid-Open Patent Application No. 52826/1983 laid-open on Mar. 29, 1983, for example, wherein the signals obtained by scanning marks on an object are converted to binary signals on the basis of a predetermined slice level to discriminate the position data; and the objects are aligned in accordance with the discrimination.
In semiconductor device manufacturing, it is not easy to keep the same conditions of the surface of the object or the alignment mark, and therefore, conventional apparatuses involve disadvantages. One of them is that the position data varies with the individual scanning operation, and the variations are particularly large, depending upon the slice level, thus making difficult reliable alignment with high precision.